<?xml version='1.0' encoding='UTF-8'?>
<?xml-stylesheet href="/static/style.xsl" type="text/xsl"?>
<rss xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/" version="2.0">
  <channel>
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    <docs>http://www.rssboard.org/rss-specification</docs>
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    <lastBuildDate>Wed, 07 Oct 2026 23:15:13 +0000</lastBuildDate>
    <item>
      <title>CVE-2021-47226 — x86/fpu: Invalidate FPU state after a failed XRSTOR from a user buffer</title>
      <link>https://cve.radiocsirt.org/vuln/cve-2021-47226</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;x86/fpu: Invalidate FPU state after a failed XRSTOR from a user buffer&lt;/p&gt;
&lt;p&gt;Both Intel and AMD consider it to be architecturally valid for XRSTOR to
fail with #PF but nonetheless change the register state.  The actual
conditions under which this might occur are unclear [1], but it seems
plausible that this might be triggered if one sibling thread unmaps a page
and invalidates the shared TLB while another sibling thread is executing
XRSTOR on the page in question.&lt;/p&gt;
&lt;p&gt;__fpu__restore_sig() can execute XRSTOR while the hardware registers
are preserved on behalf of a different victim task (using the
fpu_fpregs_owner_ctx mechanism), and, in theory, XRSTOR could fail but
modify the registers.&lt;/p&gt;
&lt;p&gt;If this happens, then there is a window in which __fpu__restore_sig()
could schedule out and the victim task could schedule back in without
reloading its own FPU registers. This would result in part of the FPU
state that __fpu__restore_sig() was attempting to load leaking into the
victim task&amp;#39;s user-visible state.&lt;/p&gt;
&lt;p&gt;Invalidate preserved FPU registers on XRSTOR failure to prevent this
situation from corrupting any state.&lt;/p&gt;
&lt;p&gt;[1] Frequent readers of the errata lists might imagine &amp;#34;complex
    microarchitectural conditions&amp;#34;.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;x86/fpu: Invalidate FPU state after a failed XRSTOR from a user buffer&lt;/p&gt;
&lt;p&gt;Both Intel and AMD consider it to be architecturally valid for XRSTOR to
fail with #PF but nonetheless change the register state.  The actual
conditions under which this might occur are unclear [1], but it seems
plausible that this might be triggered if one sibling thread unmaps a page
and invalidates the shared TLB while another sibling thread is executing
XRSTOR on the page in question.&lt;/p&gt;
&lt;p&gt;__fpu__restore_sig() can execute XRSTOR while the hardware registers
are preserved on behalf of a different victim task (using the
fpu_fpregs_owner_ctx mechanism), and, in theory, XRSTOR could fail but
modify the registers.&lt;/p&gt;
&lt;p&gt;If this happens, then there is a window in which __fpu__restore_sig()
could schedule out and the victim task could schedule back in without
reloading its own FPU registers. This would result in part of the FPU
state that __fpu__restore_sig() was attempting to load leaking into the
victim task&amp;#39;s user-visible state.&lt;/p&gt;
&lt;p&gt;Invalidate preserved FPU registers on XRSTOR failure to prevent this
situation from corrupting any state.&lt;/p&gt;
&lt;p&gt;[1] Frequent readers of the errata lists might imagine &amp;#34;complex
    microarchitectural conditions&amp;#34;.&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/cve-2021-47226</guid>
    </item>
  </channel>
</rss>
