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    <title>Most recent entries from all</title>
    <link>https://cve.radiocsirt.org</link>
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    <lastBuildDate>Fri, 09 Oct 2026 10:10:25 +0000</lastBuildDate>
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      <title>CVE-2026-98262 — ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY</title>
      <link>https://cve.radiocsirt.org/vuln/cve-2026-98262</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY&lt;/p&gt;
&lt;p&gt;A user reported that commit 105c42566a55 (&amp;#34;ata: ahci: force 32-bit DMA for
JMicron JMB582/JMB585&amp;#34;) made the JMicron JMB585 unusable on his board.&lt;/p&gt;
&lt;p&gt;The failure is seen as soon as the ahci driver is probed, and booting with
iommu=off does not solve the problem.&lt;/p&gt;
&lt;p&gt;Looking at the AHCI specification, PxCLBU and PxFBU are both read only &amp;#39;0&amp;#39;
for HBAs that do not support 64-bit addressing.&lt;/p&gt;
&lt;p&gt;For HBAs that do support 64-bit addressing, the registers are read write,
with a reset value that is Implementation Specific.&lt;/p&gt;
&lt;p&gt;When using the AHCI_HFLAG_32BIT_ONLY flag, the HBA does support 64-bit
addressing, and a 32-bit DMA mask is set by simply clearing HOST_CAP_64.
Thus, in this case, we need to explicitly clear the registers to 0.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY&lt;/p&gt;
&lt;p&gt;A user reported that commit 105c42566a55 (&amp;#34;ata: ahci: force 32-bit DMA for
JMicron JMB582/JMB585&amp;#34;) made the JMicron JMB585 unusable on his board.&lt;/p&gt;
&lt;p&gt;The failure is seen as soon as the ahci driver is probed, and booting with
iommu=off does not solve the problem.&lt;/p&gt;
&lt;p&gt;Looking at the AHCI specification, PxCLBU and PxFBU are both read only &amp;#39;0&amp;#39;
for HBAs that do not support 64-bit addressing.&lt;/p&gt;
&lt;p&gt;For HBAs that do support 64-bit addressing, the registers are read write,
with a reset value that is Implementation Specific.&lt;/p&gt;
&lt;p&gt;When using the AHCI_HFLAG_32BIT_ONLY flag, the HBA does support 64-bit
addressing, and a 32-bit DMA mask is set by simply clearing HOST_CAP_64.
Thus, in this case, we need to explicitly clear the registers to 0.&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/cve-2026-98262</guid>
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