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      <title>CVE-2021-47187 — arm64: dts: qcom: msm8998: Fix CPU/L2 idle state latency and residency</title>
      <link>https://cve.radiocsirt.org/vuln/cve-2021-47187</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;arm64: dts: qcom: msm8998: Fix CPU/L2 idle state latency and residency&lt;/p&gt;
&lt;p&gt;The entry/exit latency and minimum residency in state for the idle
states of MSM8998 were ..bad: first of all, for all of them the
timings were written for CPU sleep but the min-residency-us param
was miscalculated (supposedly, while porting this from downstream);
Then, the power collapse states are setting PC on both the CPU
cluster *and* the L2 cache, which have different timings: in the
specific case of L2 the times are higher so these ones should be
taken into account instead of the CPU ones.&lt;/p&gt;
&lt;p&gt;This parameter misconfiguration was not giving particular issues
because on MSM8998 there was no CPU scaling at all, so cluster/L2
power collapse was rarely (if ever) hit.
When CPU scaling is enabled, though, the wrong timings will produce
SoC unstability shown to the user as random, apparently error-less,
sudden reboots and/or lockups.&lt;/p&gt;
&lt;p&gt;This set of parameters are stabilizing the SoC when CPU scaling is
ON and when power collapse is frequently hit.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;arm64: dts: qcom: msm8998: Fix CPU/L2 idle state latency and residency&lt;/p&gt;
&lt;p&gt;The entry/exit latency and minimum residency in state for the idle
states of MSM8998 were ..bad: first of all, for all of them the
timings were written for CPU sleep but the min-residency-us param
was miscalculated (supposedly, while porting this from downstream);
Then, the power collapse states are setting PC on both the CPU
cluster *and* the L2 cache, which have different timings: in the
specific case of L2 the times are higher so these ones should be
taken into account instead of the CPU ones.&lt;/p&gt;
&lt;p&gt;This parameter misconfiguration was not giving particular issues
because on MSM8998 there was no CPU scaling at all, so cluster/L2
power collapse was rarely (if ever) hit.
When CPU scaling is enabled, though, the wrong timings will produce
SoC unstability shown to the user as random, apparently error-less,
sudden reboots and/or lockups.&lt;/p&gt;
&lt;p&gt;This set of parameters are stabilizing the SoC when CPU scaling is
ON and when power collapse is frequently hit.&lt;/p&gt;</content:encoded>
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