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    <title>Most recent entries from all</title>
    <link>https://cve.radiocsirt.org</link>
    <description>Contains only the most 10 recent entries.</description>
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    <lastBuildDate>Sat, 03 Oct 2026 00:56:08 +0000</lastBuildDate>
    <item>
      <title>BELL-CVE-2026-45945</title>
      <link>https://cve.radiocsirt.org/vuln/bell-cve-2026-45945</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Alpaquita:stream: linux-lts&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Alpaquita:stream: linux-lts&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/bell-cve-2026-45945</guid>
    </item>
    <item>
      <title>EUVD-2026-347967</title>
      <link>https://cve.radiocsirt.org/vuln/euvd-2026-347967</link>
      <description>EUVD-2026-347967</description>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/euvd-2026-347967</guid>
    </item>
    <item>
      <title>fkie_cve-2026-45945</title>
      <link>https://cve.radiocsirt.org/vuln/fkie_cve-2026-45945</link>
      <description>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;iommu/vt-d: Fix race condition during PASID entry replacement&lt;/p&gt;
&lt;p&gt;The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing
an active PASID entry (e.g., during domain replacement), the current
implementation calculates a new entry on the stack and copies it to the
table using a single structure assignment.&lt;/p&gt;
&lt;p&gt;struct pasid_entry *pte, new_pte;&lt;/p&gt;
&lt;p&gt;pte = intel_pasid_get_entry(dev, pasid);
        pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);
        *pte = new_pte;&lt;/p&gt;
&lt;p&gt;Because the hardware may fetch the 512-bit PASID entry in multiple
128-bit chunks, updating the entire entry while it is active (Present
bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware
could observe an inconsistent state — partially new data and partially
old data — leading to unpredictable behavior or spurious faults.&lt;/p&gt;
&lt;p&gt;Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the
&amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and
the required invalidation handshake is completed before the new
configuration is applied.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;iommu/vt-d: Fix race condition during PASID entry replacement&lt;/p&gt;
&lt;p&gt;The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing
an active PASID entry (e.g., during domain replacement), the current
implementation calculates a new entry on the stack and copies it to the
table using a single structure assignment.&lt;/p&gt;
&lt;p&gt;struct pasid_entry *pte, new_pte;&lt;/p&gt;
&lt;p&gt;pte = intel_pasid_get_entry(dev, pasid);
        pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);
        *pte = new_pte;&lt;/p&gt;
&lt;p&gt;Because the hardware may fetch the 512-bit PASID entry in multiple
128-bit chunks, updating the entire entry while it is active (Present
bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware
could observe an inconsistent state — partially new data and partially
old data — leading to unpredictable behavior or spurious faults.&lt;/p&gt;
&lt;p&gt;Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the
&amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and
the required invalidation handshake is completed before the new
configuration is applied.&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/fkie_cve-2026-45945</guid>
    </item>
    <item>
      <title>GHSA-3f6r-v6w8-rw99</title>
      <link>https://cve.radiocsirt.org/vuln/ghsa-3f6r-v6w8-rw99</link>
      <description>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;iommu/vt-d: Fix race condition during PASID entry replacement&lt;/p&gt;
&lt;p&gt;The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing
an active PASID entry (e.g., during domain replacement), the current
implementation calculates a new entry on the stack and copies it to the
table using a single structure assignment.&lt;/p&gt;
&lt;p&gt;struct pasid_entry *pte, new_pte;&lt;/p&gt;
&lt;p&gt;pte = intel_pasid_get_entry(dev, pasid);
        pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);
        *pte = new_pte;&lt;/p&gt;
&lt;p&gt;Because the hardware may fetch the 512-bit PASID entry in multiple
128-bit chunks, updating the entire entry while it is active (Present
bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware
could observe an inconsistent state — partially new data and partially
old data — leading to unpredictable behavior or spurious faults.&lt;/p&gt;
&lt;p&gt;Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the
&amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and
the required invalidation handshake is completed before the new
configuration is applied.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;iommu/vt-d: Fix race condition during PASID entry replacement&lt;/p&gt;
&lt;p&gt;The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing
an active PASID entry (e.g., during domain replacement), the current
implementation calculates a new entry on the stack and copies it to the
table using a single structure assignment.&lt;/p&gt;
&lt;p&gt;struct pasid_entry *pte, new_pte;&lt;/p&gt;
&lt;p&gt;pte = intel_pasid_get_entry(dev, pasid);
        pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);
        *pte = new_pte;&lt;/p&gt;
&lt;p&gt;Because the hardware may fetch the 512-bit PASID entry in multiple
128-bit chunks, updating the entire entry while it is active (Present
bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware
could observe an inconsistent state — partially new data and partially
old data — leading to unpredictable behavior or spurious faults.&lt;/p&gt;
&lt;p&gt;Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the
&amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and
the required invalidation handshake is completed before the new
configuration is applied.&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/ghsa-3f6r-v6w8-rw99</guid>
    </item>
    <item>
      <title>UBUNTU-CVE-2026-45945</title>
      <link>https://cve.radiocsirt.org/vuln/ubuntu-cve-2026-45945</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Ubuntu:16.04:LTS: linux-hwe-edge, Ubuntu:18.04:LTS: linux-aws-5.0, Ubuntu:18.04:LTS: linux-aws-5.3, Ubuntu:18.04:LTS: linux-azure, Ubuntu:18.04:LTS: linux-azure-5.3, Ubuntu:18.04:LTS: linux-azure-edge, Ubuntu:18.04:LTS: linux-gcp, Ubuntu:18.04:LTS: linux-gcp-5.3, Ubuntu:18.04:LTS: linux-gke-4.15, Ubuntu:18.04:LTS: linux-gke-5.4 and 106 more&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing an active PASID entry (e.g., during domain replacement), the current implementation calculates a new entry on the stack and copies it to the table using a single structure assignment.         struct pasid_entry *pte, new_pte;         pte = intel_pasid_get_entry(dev, pasid);         pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);         *pte = new_pte; Because the hardware may fetch the 512-bit PASID entry in multiple 128-bit chunks, updating the entire entry while it is active (Present bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware could observe an inconsistent state — partially new data and partially old data — leading to unpredictable behavior or spurious faults. Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the &amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and the required invalidation handshake is completed before the new configuration is applied.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Ubuntu:16.04:LTS: linux-hwe-edge, Ubuntu:18.04:LTS: linux-aws-5.0, Ubuntu:18.04:LTS: linux-aws-5.3, Ubuntu:18.04:LTS: linux-azure, Ubuntu:18.04:LTS: linux-azure-5.3, Ubuntu:18.04:LTS: linux-azure-edge, Ubuntu:18.04:LTS: linux-gcp, Ubuntu:18.04:LTS: linux-gcp-5.3, Ubuntu:18.04:LTS: linux-gke-4.15, Ubuntu:18.04:LTS: linux-gke-5.4 and 106 more&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing an active PASID entry (e.g., during domain replacement), the current implementation calculates a new entry on the stack and copies it to the table using a single structure assignment.         struct pasid_entry *pte, new_pte;         pte = intel_pasid_get_entry(dev, pasid);         pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);         *pte = new_pte; Because the hardware may fetch the 512-bit PASID entry in multiple 128-bit chunks, updating the entire entry while it is active (Present bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware could observe an inconsistent state — partially new data and partially old data — leading to unpredictable behavior or spurious faults. Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the &amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and the required invalidation handshake is completed before the new configuration is applied.&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/ubuntu-cve-2026-45945</guid>
    </item>
    <item>
      <title>WID-SEC-W-2026-1700 — Linux Kernel: Mehrere Schwachstellen</title>
      <link>https://cve.radiocsirt.org/vuln/wid-sec-w-2026-1700</link>
      <description>&lt;p&gt;Ein Angreifer kann mehrere Schwachstellen im Linux Kernel ausnutzen, um einen Denial of Service Angriff durchzuführen oder andere nicht näher spezifizierte Auswirkungen zu erzielen.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;Ein Angreifer kann mehrere Schwachstellen im Linux Kernel ausnutzen, um einen Denial of Service Angriff durchzuführen oder andere nicht näher spezifizierte Auswirkungen zu erzielen.&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/wid-sec-w-2026-1700</guid>
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