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    <title>Most recent entries from all</title>
    <link>https://cve.radiocsirt.org</link>
    <description>Contains only the most 10 recent entries.</description>
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    <lastBuildDate>Sat, 03 Oct 2026 09:04:16 +0000</lastBuildDate>
    <item>
      <title>bdu:2026-05855</title>
      <link>https://cve.radiocsirt.org/vuln/bdu:2026-05855</link>
      <description>bdu:2026-05855</description>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/bdu:2026-05855</guid>
    </item>
    <item>
      <title>certfr-2025-avi-0895 — De multiples vulnérabilités ont été découvertes dans le noyau Linux de SUSE. Certaines d'entre elles permettent à un at…</title>
      <link>https://cve.radiocsirt.org/vuln/certfr-2025-avi-0895</link>
      <description>certfr-2025-avi-0895</description>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/certfr-2025-avi-0895</guid>
    </item>
    <item>
      <title>EUVD-2026-311187</title>
      <link>https://cve.radiocsirt.org/vuln/euvd-2026-311187</link>
      <description>EUVD-2026-311187</description>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/euvd-2026-311187</guid>
    </item>
    <item>
      <title>fkie_cve-2022-50370</title>
      <link>https://cve.radiocsirt.org/vuln/fkie_cve-2022-50370</link>
      <description>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;i2c: designware: Fix handling of real but unexpected device interrupts&lt;/p&gt;
&lt;p&gt;Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI
IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel
Alder Lake-S where system crashes to NULL pointer dereference in
i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;).&lt;/p&gt;
&lt;p&gt;I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made
following notes:&lt;/p&gt;
&lt;p&gt;- Issue happens when resuming from S3 but not when resuming from
  &amp;#34;s2idle&amp;#34;
- PCI device 00:15.0 == i2c_designware.0 is already in D0 state when
  system enters into pci_pm_resume_noirq() while all other i2c_designware
  PCI devices are in D3. Devices were runtime suspended and in D3 prior
  entering into suspend
- Interrupt comes after pci_pm_resume_noirq() when device interrupts are
  re-enabled
- According to register dump the interrupt really comes from the
  i2c_designware.0. Controller is enabled, I2C target address register
  points to a one detectable I2C device address 0x60 and the
  DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and
  TX_EMPTY bits are set indicating completed I2C transaction.&lt;/p&gt;
&lt;p&gt;My guess is that the firmware uses this controller to communicate with
an on-board I2C device during resume but does not disable the controller
before giving control to an operating system.&lt;/p&gt;
&lt;p&gt;I was told the UEFI update fixes this but never the less it revealed the
driver is…&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;i2c: designware: Fix handling of real but unexpected device interrupts&lt;/p&gt;
&lt;p&gt;Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI
IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel
Alder Lake-S where system crashes to NULL pointer dereference in
i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;).&lt;/p&gt;
&lt;p&gt;I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made
following notes:&lt;/p&gt;
&lt;p&gt;- Issue happens when resuming from S3 but not when resuming from
  &amp;#34;s2idle&amp;#34;
- PCI device 00:15.0 == i2c_designware.0 is already in D0 state when
  system enters into pci_pm_resume_noirq() while all other i2c_designware
  PCI devices are in D3. Devices were runtime suspended and in D3 prior
  entering into suspend
- Interrupt comes after pci_pm_resume_noirq() when device interrupts are
  re-enabled
- According to register dump the interrupt really comes from the
  i2c_designware.0. Controller is enabled, I2C target address register
  points to a one detectable I2C device address 0x60 and the
  DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and
  TX_EMPTY bits are set indicating completed I2C transaction.&lt;/p&gt;
&lt;p&gt;My guess is that the firmware uses this controller to communicate with
an on-board I2C device during resume but does not disable the controller
before giving control to an operating system.&lt;/p&gt;
&lt;p&gt;I was told the UEFI update fixes this but never the less it revealed the
driver is…&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/fkie_cve-2022-50370</guid>
    </item>
    <item>
      <title>GHSA-589j-8g5m-4cxh</title>
      <link>https://cve.radiocsirt.org/vuln/ghsa-589j-8g5m-4cxh</link>
      <description>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;i2c: designware: Fix handling of real but unexpected device interrupts&lt;/p&gt;
&lt;p&gt;Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI
IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel
Alder Lake-S where system crashes to NULL pointer dereference in
i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;).&lt;/p&gt;
&lt;p&gt;I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made
following notes:&lt;/p&gt;
&lt;p&gt;- Issue happens when resuming from S3 but not when resuming from
  &amp;#34;s2idle&amp;#34;
- PCI device 00:15.0 == i2c_designware.0 is already in D0 state when
  system enters into pci_pm_resume_noirq() while all other i2c_designware
  PCI devices are in D3. Devices were runtime suspended and in D3 prior
  entering into suspend
- Interrupt comes after pci_pm_resume_noirq() when device interrupts are
  re-enabled
- According to register dump the interrupt really comes from the
  i2c_designware.0. Controller is enabled, I2C target address register
  points to a one detectable I2C device address 0x60 and the
  DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and
  TX_EMPTY bits are set indicating completed I2C transaction.&lt;/p&gt;
&lt;p&gt;My guess is that the firmware uses this controller to communicate with
an on-board I2C device during resume but does not disable the controller
before giving control to an operating system.&lt;/p&gt;
&lt;p&gt;I was told the UEFI update fixes this but never the less it revealed the
driver is…&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;i2c: designware: Fix handling of real but unexpected device interrupts&lt;/p&gt;
&lt;p&gt;Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI
IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel
Alder Lake-S where system crashes to NULL pointer dereference in
i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;).&lt;/p&gt;
&lt;p&gt;I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made
following notes:&lt;/p&gt;
&lt;p&gt;- Issue happens when resuming from S3 but not when resuming from
  &amp;#34;s2idle&amp;#34;
- PCI device 00:15.0 == i2c_designware.0 is already in D0 state when
  system enters into pci_pm_resume_noirq() while all other i2c_designware
  PCI devices are in D3. Devices were runtime suspended and in D3 prior
  entering into suspend
- Interrupt comes after pci_pm_resume_noirq() when device interrupts are
  re-enabled
- According to register dump the interrupt really comes from the
  i2c_designware.0. Controller is enabled, I2C target address register
  points to a one detectable I2C device address 0x60 and the
  DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and
  TX_EMPTY bits are set indicating completed I2C transaction.&lt;/p&gt;
&lt;p&gt;My guess is that the firmware uses this controller to communicate with
an on-board I2C device during resume but does not disable the controller
before giving control to an operating system.&lt;/p&gt;
&lt;p&gt;I was told the UEFI update fixes this but never the less it revealed the
driver is…&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/ghsa-589j-8g5m-4cxh</guid>
    </item>
    <item>
      <title>SUSE-SU-2025:03615-1 — Security update for the Linux Kernel</title>
      <link>https://cve.radiocsirt.org/vuln/suse-su-2025:03615-1</link>
      <description>&lt;p&gt;Security update for the Linux Kernel&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;Security update for the Linux Kernel&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/suse-su-2025:03615-1</guid>
    </item>
    <item>
      <title>UBUNTU-CVE-2022-50370</title>
      <link>https://cve.radiocsirt.org/vuln/ubuntu-cve-2022-50370</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Ubuntu:16.04:LTS: linux-hwe-edge, Ubuntu:18.04:LTS: linux-aws-5.0, Ubuntu:18.04:LTS: linux-aws-5.3, Ubuntu:18.04:LTS: linux-azure, Ubuntu:18.04:LTS: linux-azure-5.3, Ubuntu:18.04:LTS: linux-azure-edge, Ubuntu:18.04:LTS: linux-gcp, Ubuntu:18.04:LTS: linux-gcp-5.3, Ubuntu:18.04:LTS: linux-gke-4.15, Ubuntu:18.04:LTS: linux-gke-5.4 and 101 more&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved: i2c: designware: Fix handling of real but unexpected device interrupts Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel Alder Lake-S where system crashes to NULL pointer dereference in i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;). I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made following notes: - Issue happens when resuming from S3 but not when resuming from   &amp;#34;s2idle&amp;#34; - PCI device 00:15.0 == i2c_designware.0 is already in D0 state when   system enters into pci_pm_resume_noirq() while all other i2c_designware   PCI devices are in D3. Devices were runtime suspended and in D3 prior   entering into suspend - Interrupt comes after pci_pm_resume_noirq() when device interrupts are   re-enabled - According to register dump the interrupt really comes from the   i2c_designware.0. Controller is enabled, I2C target address register   points to a one detectable I2C device address 0x60 and the   DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and   TX_EMPTY bits are set indicating completed I2C transaction. My guess is that the firmware uses this controller to communicate with an on-board I2C device during resume but does not disable the controller before giving control to an operating system. I was told the UEFI update fixes this but never the less it revealed the driver is not r…&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Ubuntu:16.04:LTS: linux-hwe-edge, Ubuntu:18.04:LTS: linux-aws-5.0, Ubuntu:18.04:LTS: linux-aws-5.3, Ubuntu:18.04:LTS: linux-azure, Ubuntu:18.04:LTS: linux-azure-5.3, Ubuntu:18.04:LTS: linux-azure-edge, Ubuntu:18.04:LTS: linux-gcp, Ubuntu:18.04:LTS: linux-gcp-5.3, Ubuntu:18.04:LTS: linux-gke-4.15, Ubuntu:18.04:LTS: linux-gke-5.4 and 101 more&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved: i2c: designware: Fix handling of real but unexpected device interrupts Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel Alder Lake-S where system crashes to NULL pointer dereference in i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;). I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made following notes: - Issue happens when resuming from S3 but not when resuming from   &amp;#34;s2idle&amp;#34; - PCI device 00:15.0 == i2c_designware.0 is already in D0 state when   system enters into pci_pm_resume_noirq() while all other i2c_designware   PCI devices are in D3. Devices were runtime suspended and in D3 prior   entering into suspend - Interrupt comes after pci_pm_resume_noirq() when device interrupts are   re-enabled - According to register dump the interrupt really comes from the   i2c_designware.0. Controller is enabled, I2C target address register   points to a one detectable I2C device address 0x60 and the   DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and   TX_EMPTY bits are set indicating completed I2C transaction. My guess is that the firmware uses this controller to communicate with an on-board I2C device during resume but does not disable the controller before giving control to an operating system. I was told the UEFI update fixes this but never the less it revealed the driver is not r…&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/ubuntu-cve-2022-50370</guid>
    </item>
    <item>
      <title>WID-SEC-W-2025-2087 — Linux Kernel: Mehrere Schwachstellen</title>
      <link>https://cve.radiocsirt.org/vuln/wid-sec-w-2025-2087</link>
      <description>&lt;p&gt;Ein Angreifer kann mehrere Schwachstellen im Linux Kernel ausnutzen, um einen Denial of Service Angriff durchzuführen oder nicht näher beschriebene Auswirkungen zu erzielen.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;Ein Angreifer kann mehrere Schwachstellen im Linux Kernel ausnutzen, um einen Denial of Service Angriff durchzuführen oder nicht näher beschriebene Auswirkungen zu erzielen.&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://cve.radiocsirt.org/vuln/wid-sec-w-2025-2087</guid>
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