https://cve.radiocsirt.org/rss/recent/all/10 Most recent entries from all 2026-10-17T21:25:34.356334+00:00 Vulnerability-Lookup csirt@opendfir.org python-feedgen Contains only the most 10 recent entries. https://cve.radiocsirt.org/vuln/euvd-2026-260655 EUVD-2026-260655 2026-10-17T21:25:34.358253+00:00 EUVD-2026-260655 https://cve.radiocsirt.org/vuln/fkie_cve-2025-63384 fkie_cve-2025-63384 2026-10-17T21:25:34.358284+00:00

A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability.

 https://cve.radiocsirt.org/vuln/ghsa-g435-j3hg-9vfh GHSA-g435-j3hg-9vfh 2026-10-17T21:25:34.358315+00:00

A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability.